The Programmable Logic Arrays are abbreviated as PLA. They come under programmable logic devices. The PLA consists of two programmable arrays, one of which is Programmable AND array and Programmable OR array. The basic block diagram for PLA is below.
The input through PLA are through AND gates and they are programmable. The input provided to each AND gate can be the same input value or its complement form. This helps us to have only product terms at the AND gate output. The AND gates outputs is fed as input to the OR gates. These inputs to the OR gates can be programmed accordingly.
Internal Circuit of Programmable Logic Arrays
The circuit consists of four programmable AND gates and two programmable OR gates. The internal circuit for PLA is shown below.
The Boolean Expression for above circuit will be
The given two functions are in sum of products form. The number of product terms present in the given Boolean functions A & B are two and three respectively.
The programmable AND gates can control both normal and complemented inputs of variables. From the above figure we see input XZ’ is available for both the AND gates. So, we can just program only the required literals in order to generate one product term by each AND gate.
All these product terms are available at the inputs of each programmable OR gate. But, only program the required product terms in order to produce the respective Boolean functions by each OR gate. We use symbol X in programmable connections.
We use them in implementation of counters. In state transition machine, synchronization, decoders and bus interface we use programmable logic arrays.
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