Savitribai Phule Pune University, Maharashtra (SPPU), Information Technology Semester 3, Logic Design & Computer Organization Syllabus

Logic Design & Computer Organization Lecture notes | Videos | Free pdf Download | Previous years solved question papers | MCQs | Question Banks| Syllabus
Get access to 100s of MCQs, Question banks, notes and videos as per your syllabus.
Try Now for free

Unit - 1 Introduction To Digital Electronics

Unit 1

Introduction to Digital Electronics

1.1 Digital IC Characteristics

1.2 TTL Standard TTL characteristics

1.3 Operation of TTL NAND gate

1.4 Standard CMOS characteristics

1.5 Operation of CMOS NAND gate

1.6 Comparison of TTL CMOS

1.7 Signed Binary number representation and Arithmetic Sign Magnitude

1.8 1’s complement 2’s complement representation

1.9 Unsigned Binary arithmetic addition subtraction multiplication and division

1.10 Subtraction using 2’s complement

1.11 IEEE Standard 754 Floating point number representations

1.12 Codes Binary BCD octal hexadecimal

1.13 Excess3

1.14 Gray code their conversions

1.15 Representation of logic functions logic statement

1.16 Truth table

1.17 SOP and POS form

1.18 Simplification of logical functions using KMaps up to 4 variables

Unit - 2 Combinational Logic Design

Unit 2

Combinational Logic Design

2.1 Design using SSI chips

2.2 Multiplexer IC 74153

2.3 Demultiplexer IC 74138

2.4 Decoder 74238

2.5 Encoder IC 74147

2.6 Binary adder IC 7483

2.7 BCD adder subtractor using IC 7483

2.8 Implementation of logic functions using IC 74153

Unit - 3 Sequential Logic Design

Unit 3

Sequential Logic Design

3.1 Introduction to sequential circuits

3.2 Difference between combinational circuits and sequential circuits

3.3 Memory elementlatch FlipFlop

3.4 Flip Flops Logic diagram

3.5 Truth table excitation table of SR JK D T flip flops

3.6 Conversion from one FF to another

3.7 Study of flip flops with regard to asynchronous and synchronous Preset Clear

3.8 Master Slave configuration

3.9 Study of 7474

3.10 7476 flip flop ICs

3.11 Application of flipflops Counters asynchronous

3.12 Synchronous and modulo n counters

3.13 Study of 7490 modulus n counter ICs their applications to implement mod counters

3.14 Registers shift

3.15 Register types SISO SIPO PISO PIPO applications

Unit - 4 Computer Organization & Processor

Unit 4

Computer Organization Processor

4.1 Organization functions types of computer units

4.2 CPU typical organization Functions Types

4.3 Memory Types their uses in computer

4.4 IO types functions system bus Address data control

4.5 Typical control lines

4.6 MultipleBus Hierarchies

4.7 Von Neumann Harvard architecture

4.8 Instruction cycle

4.9 Single bus organization of CPU

4.10 ALU ALU signals functions types

4.11 Register types functions of user visible

4.12 Control status registers such as general purpose address registers data registers flags PC MAR MBR IR control unit control signals typical organization of hard wired microprogrammed CU

4.13 Micro Operations fetch indirect execute interrupt and control signals for these micro operations

Unit - 5 Processor Instructions & Processor Enhancements

Unit 5

Processor Instructions Processor Enhancements

5.1 Instruction elements of machine instruction

5.2 Instruction representation Opcode mnemonics Assembly language elements

5.3 Instruction Format 0123 address formats

5.4 Types of operands

5.5 Addressing modes

5.6 Instruction types based on operations functions examples of each

5.7 Key characteristics of RISC CISC

5.8 Interrupt its purpose types classes interrupt handling ISR multiple interrupts exceptions

5.9 Instruction pipelining operation speed up

5.10 Multiprocessor systems Taxonomy of Parallel Processor Architectures

5.11 Two types of MIMD clusters SMP organization benefits multicore processor various Alternatives advantages 0f multicores

5.12 Typical features of multicore Intel core i7

Unit - 6 Memory & Input - Output Systems

Unit 6

Memory Input Output Systems

6.1 Memory Systems Characteristics of Memory Systems

6.2 Memory Hierarchy

6.3 Signals to connect memory to processor

6.4 Memory read writes cycle

6.5 Characteristics of semiconductor memory SRAM DRAM ROM

6.6 Cache Memory – Principle of Locality

6.7 Organization

6.8 Mapping functions

6.9 Write policies

6.10 Replacement policies

6.11 Multilevel Caches

6.12 Cache Coherence

6.13 Input Output Systems IO Module

6.14 Programmed IO Interrupt Driven IO Direct Memory Access DMA

Download IT Sem 3 syllabus pdf
Get access to 100s of MCQs, Question banks, notes and videos as per your syllabus.
Try Now for free
Other Subjects of Semester-1
Discrete mathematics
Basics of computer network
Data structure & algorithms
Object-oriented programming
Popular posts
Top 10 free online resources to learn coding
What is machine learning
Top 10 jobs in information technology
An overview of object oriented programming
What is sorting algorithm
Share  
Link Copied
More than 1 Million students use Goseeko! Join them to feel the power of smart learning.
Spot anything incorrect? Contact us