Other university, Computer Engineering , Digital Circuits Syllabus

204182: Digital Circuits

Credit 03

Unit I Digital Logic Families
Classification and Characteristics of digital Logic Families: Speed, power dissipation, figure of merit,
fan in, fan out, current, voltage, noise immunity, operating temperatures and power supply requirements.
TTL logic. Operation of TTL NAND gate, active pull up, wired AND, open collector output, unconnected
inputs. Tri-State logic. CMOS logic: CMOS inverter, NAND, NOR gates, unconnected inputs, wired logic,
open drain output. Interfacing CMOS and TTL, Data sheet specifications.
Mapping of Course Outcomes for Unit I CO1: Identify and prevent various hazards and timing problems in a digital design.

Unit II Combinational Logic Design
Definition of combinational logic, canonical forms, Standard representations for logic functions, k-map
representation of logic functions (SOP and POS forms), minimization of logical functions for min-terms
and max-terms (upto 4 variables), don‟t care conditions, Design Examples: Arithmetic Circuits, BCD to
7 segment decoder, Code converters. Introduction to Quine- McCluskey method, Quine McCluskey
using don‟t care terms, Reduced prime implicants Tables.
Mapping of Course Outcomes for Unit II CO2: Use the basic logic gates and various reduction techniques of digital logic circuit.

Unit III Combinational Circuits 
Adders and their use as subtractor, look ahead carry, ALU, Digital Comparator, Parity generators/checkers, Multiplexers and their use in combinational logic designs, multiplexer trees, De- multiplexers and their use in combinational logic designs, Decoders, Demultiplexer trees.

Mapping of Course Outcomes for Unit III CO3: Analyze, design and implement combinational logic circuits.

Unit IV Sequential Logic Design 

1 Bit Memory Cell, Clocked SR, JK, MS J-K flip flop, D and T flip-flops. Use of preset and clear
terminals, hold and setup time and metastability.
Excitation Table for flip flop, Conversion of flip flops, Typical data sheet specifications of Flip flop
application of Flip flops.
Registers, Shift registers, Counters (ring counters, twisted ring counters), ripple counters, Mod-n counters,
up/down counters, synchronous counters, lock out, Clock Skew, Clock jitter. Effect on synchronous
designs, Sequence Generators.
Mapping of Course Outcomes for Unit IV CO4: Analyze, design and implement sequential circuits.

Unit V State Machines 
Basic design steps- State diagram, State table, State reduction, State assignment, Mealy and Moore
machines representation, Implementation, finite state machine implementation, Sequence detector.
Introduction to Algorithmic state machines- construction of ASM chart and realization for sequential
circuits
Mapping of Course Outcomes for Unit V CO5: Differentiate between Mealy and Moore machines.

Unit VI Programmable Logic Devices
Programmable logic devices: Detail architecture, Study of PROM, PAL, PLA, General Architecture,
features and typical specifications of FPGA and CPLD. Semiconductor memories: memory
organization and operation, expanding memory size, Classification and characteristics of memories,
RAM ROM, EPROM, EEPROM, NVRAM, SRAM, and DRAM. Designing combinational circuits
using PLDs.
Mapping of Course Outcomes for Unit VI CO6: Analyze digital system design using PLD.

Learning Resources

Text Books:
1. R.P. Jain, “Modern Digital Electronics”, Tata McGraw Hill Publication, 3rd Edition.

2. Thomas Floyd, “Digital Electronics”, 11th Edition.
3. M. Morris Mano, “Digital Logic and Computer Design”, Prentice Hall of India, 4th Edition.

4. Taub and Schilling, “Digital Principles and Applications,” TMH.
Reference Books:
1. Anand Kumar, “Fundamentals of Digital Circuits”, Prentice Hall of India, 1st Edition.

2. J. F. Wakerly, “Digital Design- Principles and Practices,”, Pearson, 3rd Edition.

3. M. M. Mano, “Digital Design,” Prentice Hall India.