Aryabhatta Knowledge University, Bihar, Information Technology Semester 3, Digital Electronics Syllabus

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Unit - 2 Combinational Digital Circuits
Unit 2
Combinational Digital Circuits
2.1 Standard representation for logic functions Kmap representation
2.2 Simplification of logic functions using Kmap
2.3 Minimization of logical functions
2.4 Don’t care conditions
2.5 Multiplexer DeMultiplexerDecoders
2.6 Adders Subtractors
2.7 BCD arithmetic
2.8 Look ahead carry adder
2.9 Serial adder
2.10 ALU elementary ALU design
2.11 Popular MSI chips
2.12 Digital comparator
2.13 Parity checkergenerator
2.14 Code converters
2.15 Priority encoders
2.16 Decodersdrivers for display devices
2.17 QM method of function realization
3.15 Asynchronous Sequential Counters
Unit 2
Combinational Digital Circuits
2.1 Standard representation for logic functions Kmap representation
2.2 Simplification of logic functions using Kmap
2.3 Minimization of logical functions
2.4 Don’t care conditions
2.5 Multiplexer DeMultiplexerDecoders
2.6 Adders Subtractors
Unit 2
Combinational Digital Circuits
2.1 Standard representation for logic functions Kmap representation
2.2 Simplification of logic functions using Kmap
2.3 Minimization of logical functions
2.4 Don’t care conditions
2.5 Multiplexer DeMultiplexerDecoders
2.6 Adders Subtractors
2.7 BCD arithmetic
2.8 Look ahead carry adder
2.9 Serial adder
2.10 ALU elementary ALU design
2.11 Popular MSI chips
2.12 Digital comparator
2.13 Parity checkergenerator
2.14 Code converters
2.15 Priority encoders
2.16 Decodersdrivers for display devices
2.17 QM method of function realization
Unit 2
Combinational Digital Circuits
2.1 Standard representation for logic functions Kmap representation
2.2 Simplification of logic functions using Kmap
2.3 Minimization of logical functions
2.4 Don’t care conditions
2.5 Multiplexer DeMultiplexerDecoders
2.6 Adders Subtractors
2.7 BCD arithmetic
2.8 Look ahead carry adder
2.9 Serial adder
2.10 ALU elementary ALU design
2.11 Popular MSI chips
2.12 Digital comparator
2.13 Parity checkergenerator
2.14 Code converters
2.15 Priority encoders
2.16 Decodersdrivers for display devices
2.17 QM method of function realization
Unit - 3 Sequential circuits and systems
Unit 3
Sequential circuits and systems
3.1 A 1Bit Memory
3.2 The Circuit Properties of Bistable Latch
3.3 The Clocked SR Flip Flop
3.4 J KT And D Types Flip Flops
3.5 Applications Of Flip Flops
3.6 Shift Registers
3.7 Applications Of Shift Registers
3.8 Serial To Parallel Converter
3.9 Ring Counter
3.10 Sequence Generator
3.11 Ripple Asynchronous Counters
3.12 Synchronous Counters
3.13 Counters Design Using Flip Flops
3.14 Special Counter IC’s
3.15 Asynchronous Sequential Counters
3.16 Applications of Counters.
4.5 Sample and Hold Circuit
Unit 3
Sequential circuits and systems
3.1 A 1Bit Memory
3.2 The Circuit Properties of Bistable Latch
3.3 The Clocked SR Flip Flop
3.4 J KT And D Types Flip Flops
3.5 Applications of Flip Flops
3.6 Shift Registers
3.7 Applications of Shift Registers
3.8 Serial to Parallel Converter
3.9 Ring Counter
3.10 Sequence Generator
3.11 Ripple Asynchronous Counters
3.12 Synchronous Counters
3.13 Counters Design Using Flip Flops
3.14 Special Counter IC’s
Unit 3
Sequential circuits and systems
3.1 A 1Bit Memory
3.2 The Circuit Properties of Bistable Latch
3.3 The Clocked SR Flip Flop
3.4 J KT And D Types Flip Flops
3.5 Applications of Flip Flops
3.6 Shift Registers
3.7 Applications of Shift Registers
3.8 Serial to Parallel Converter
3.9 Ring Counter
3.10 Sequence Generator
3.11 Ripple Asynchronous Counters
3.12 Synchronous Counters
3.13 Counters Design Using Flip Flops
3.14 Special Counter IC’s
3.15 Asynchronous Sequential Counters
3.16 Applications of Counters
Unit 3
Sequential circuits and systems
3.1 A 1Bit Memory
3.2 The Circuit Properties of Bistable Latch
3.3 The Clocked SR Flip Flop
3.4 J KT And D Types Flip Flops
3.5 Applications of Flip Flops
3.6 Shift Registers
3.7 Applications of Shift Registers
3.8 Serial to Parallel Converter
3.9 Ring Counter
3.10 Sequence Generator
3.11 Ripple Asynchronous Counters
3.12 Synchronous Counters
3.13 Counters Design Using Flip Flops
3.14 Special Counter IC’s
3.15 Asynchronous Sequential Counters
3.16 Applications of Counters
Unit - 4 A/D and D/A Converters
Unit 4
AD and DA Converters
4.1 Digital To Analog Converters Weighted ResistorConverter
4.2 R2R ladder DA Converter
4.3 Specifications For DA Converters
4.4 Examples Of DA Converter Lcs
4.5 Sample and Hold Circuit
4.6 Analog To Digital Converters Quantization And Encoding
4.7 Parallel Comparator AD Converter
4.8 Successive Approximation AD Converter
4.9 Counting AD Converter
4.10 Dual Slope AD Converter
4.11 AD Converter Using Voltage To Frequency And Voltage To Time Conversion
4.12 Specifications Of AD Converters
Unit 4
AD and DA Converters
4.1 Digital To Analog Converters Weighted ResistorConverter
4.2 R2R ladder DA Converter
4.3 Specifications For DA Converters
4.4 Examples Of DA Converter ICs
Unit 4
AD and DA Converters
4.1 Digital To Analog Converters Weighted ResistorConverter
4.2 R2R ladder DA Converter
4.3 Specifications For DA Converters
4.4 Examples Of DA Converter ICs
4.5 Sample and Hold Circuit
4.6 Analog To Digital Converters Quantization And Encoding
4.7 Parallel Comparator AD Converter
4.8 Successive Approximation AD Converter
4.9 Counting AD Converter
4.10 Dual Slope AD Converter
4.11 AD Converter Using Voltage To Frequency And Voltage To Time Conversion
4.12 Specifications Of AD Converters example of AD converter ICs
Unit 4
AD and DA Converters
4.1 Digital To Analog Converters Weighted ResistorConverter
4.2 R2R ladder DA Converter
4.3 Specifications For DA Converters
4.4 Examples Of DA Converter ICs
4.5 Sample and Hold Circuit
4.6 Analog To Digital Converters Quantization And Encoding
4.7 Parallel Comparator AD Converter
4.8 Successive Approximation AD Converter
4.9 Counting AD Converter
4.10 Dual Slope AD Converter
4.11 AD Converter Using Voltage To Frequency And Voltage To Time Conversion
4.12 Specifications Of AD Converters example of AD converter ICs
Unit - 5 Semiconductor memories and Programmable logic devices
Unit – 5
Semiconductor memories and Programmable logic devices
5.1 Memory organization and operation
5.2 Expanding Memory Size
5.3 Classification and Characteristics of Memories
5.4 Sequential Memory
5.5 Read Only Memory ROM
5.6 Read and Write Memory RAM
5.7 Content Addressable Memory CAM
5.8 Charge De Coupled Device Memory CCD
5.9 Commonly Used Memory Chips
5.10 ROM as A PLD
5.11 Programmable Logic Array
5.12 Programmable Array Logic
5.13 Complex Programmable Logic Devices CPLDS
5.14 Field Programmable Gate Array FPGA
Unit 5
Semiconductor memories and Programmable logic devices
5.1 Memory organization and operation
5.2 Expanding Memory Size
5.3 Classification and Characteristics of Memories
5.4 Sequential memory read only memory ROM read and write memoryRAM content addressable memory CAM charge de coupled device memory CCD
5.5 Commonly Used Memory Chips
5.6 ROM as a PLD
5.7 Programmable Logic Array
5.8 Programmable Array Logic
5.9 Complex Programmable Logic Devices CPLDS
5.10 Field Programmable Gate Array FPGA
Unit 5
Semiconductor memories and Programmable logic devices
5.1 Memory organization and operation
5.2 Expanding Memory Size
5.3 Classification and Characteristics of Memories
5.4 Sequential memory read only memory ROM read and write memoryRAM content addressable memory CAM charge de coupled device memory CCD
5.5 Commonly Used Memory Chips
5.6 ROM as a PLD
5.7 Programmable Logic Array
5.8 Programmable Array Logic
5.9 Complex Programmable Logic Devices CPLDS
5.10 Field Programmable Gate Array FPGA
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